Programmable delay circuits are often used in integrated circuit applications to fix hold time issues that are discovered in both pre-silicon and post-silicon manufacturing stages. With advances in integrated circuit (IC) technology, such as the use of fin field effect transistors (FINFETs), however, the observed delay of each individual CMOS inverter in a delay circuit is decreasing, and greater variations are seen in the delay of the CMOS inverters. With the decrease in observed delay and the increase in variability, more delay elements are required to provide suitable delay options. The increased number of delay elements can increase the circuit area occupied by the delay circuitry by a factor of two or more.